Relevant Talks

[Rammig 94]

F Rammig (session chair): E Börger, D Borrione, S Krolikoski, G Musgrave, C Delgado Kloos, M Payer, Formal Semantics of VHDL: Practical Need or Academic Pleasure, Panel at EURO-DAC'94 with EURO-VHDL'94, Grenoble, 19 -- 23 September 1994.

This panel brought together experts representing external and internal views of the issue from the academic, vendor and user community.

[Breuer 95]

P T Breuer: A process algebra for VHDL, 3rd EuroFORM workshop, 3 -- 5 February 1995, Dresden

The talk set out an algebraic treatment based on the model theoretic semantics that we have developed in previous papers. The trick is to read the model in the right way to give one an algebra.